The present invention relates to semiconductor devices, in particular, semiconductor devices with metal gate electrodes.
Complementary metal oxide semiconductor (CMOS) devices with very thin gate dielectrics made from silicon dioxide may experience unacceptable gate leakage currents. Forming the gate dielectric from certain high dielectric constant (k) dielectric materials, instead of silicon dioxide, can reduce gate leakage. Because such a dielectric may not be compatible with polysilicon, it may be desirable to replace polysilicon based gate electrodes with metal gate electrodes in devices that include high-k gate dielectrics.
To form metal NMOS and PMOS gate electrodes that have appropriate workfunctions, it may be necessary to form them from different materials—one that ensures an acceptable workfunction for the NMOS gate electrode, and another that ensures an acceptable workfunction for the PMOS gate electrode. A replacement gate process may be used to form metal NMOS and PMOS gate electrodes from different metals. In that process, a first polysilicon layer, bracketed by a pair of spacers, is removed selectively to a second polysilicon layer to create a trench between the spacers. The selective removal may include the use of selective etchant, such as tetramethyl ammonium hydroxide (TMAH) or NH4OH, with sonication. The trench is filled with a first metal. The second polysilicon layer is then removed, and replaced with a second metal that differs from the first metal.
In a subtractive process for forming metal gate transistors with high-k dielectric layers, the dielectric layer is covered by different metal layers and a polysilicon masking layer. These layers are then etched to define NMOS and PMOS gate electrodes.
With existing metal gate over high-k dielectric structures, the workfunction metal may exhibit reactivity with conventional semiconductor processes, especially wet etch processes. In addition, the workfunction metal may not adhere well to the gate dielectric. Also, existing metal gate structures may not meet targeted threshold voltages, may have insufficient mobility and gate dielectric thickness may be excessive.
Thus, there is a need for a better structures for metal gate transistors.